搜索资源列表
farrow
- 一份很好的数字时延程序（采用farrow算法），采用Verilog HDL，经过测试通过，是我一个雷达项目中的代替模拟时延的。精度很高，并有MATLAB程序验证-A good digital delay, Verilog HDL, procedures, is my test through a radar simulation project instead of the delay. Precision is high, and MATLAB validation
zbt_test
- zbt sram测试VHDL程序，实现了FPGA与ZBT SRAM之间的接口控制，在FPGA内能实现对ZBT SRAM读写-vhdl program for ZBT SRAM test
colorlight
- 用VERILOG编写的用于测试FPGA的跑马灯程序-Prepared for testing with the VERILOG FPGA' s marquee program ....
LCD12864
- 在Quartus II环境下开发 应用VHDL语言编写 用于LCD12864的测试程序-In the Quartus II environment, development and application of VHDL language test procedures for LCD12864
LCD1602
- VHDL语言，1602显示屏的驱动程序，本人已在自己开发板上测试成功，需要的朋友下载后根据自己的开发板稍加修改即可 - 1602 display driver, I have tested successfully in my own test board, you need slightly modified according to your own test board
VHDL
- vhdl交通灯程序，包括波形测试文件和交通灯控制文件。-vhdl traffic light procedures, including wave test file and traffic light control file.
motor-positioning-control-vhdl
- 步进电机定位控制系统VHDL程序与仿真,绝对能用,经本人毕设测试!-Stepper motor positioning control system and simulation of VHDL program, absolutely can, after I completed the test set!
ReadFsm
- VHDL小程序，read FSM。可以作为VHDL一次作业使用。包含测试文档testbench。-VHDL applet, read FSM. A job can be used as a VHDL。VHDL code and testbench.
hc595
- HC595并串转换程序，Verilog语言编写，经过硬件平台测试-HC595 and string conversion process, Verilog language, after testing the hardware platform
ADSP2011Local
- pci9054芯片本地总线控制示例程序，可用于pci驱动和应用程序的测试。每隔一段时间产生一次中断，产生1，2，3等递增数据，配合pci9054驱动和应用程序完成数据传输 2.说明：文件夹内是Quartus 9.0的工程文件，使用Verilog语言。-pci9054 local bus control chip sample program can be used for pci driver and application testing. Generate an interrupt at r
vga_test
- 基于FPGA的vga测试程序，用vhdl编写，经过测试可以使用-FPGA-based vga test program, written using vhdl, tested using
test3
- VHDL的测试程序 程序3 很好用 -VHDL test programs very good programs ，you can uses it easily
keyboard
- 一个VHDL按键测试程序，对初学者非常有帮助。-VHDL key test program, very helpful for beginners.
VHDL-key1
- 利用VHDL程序按键消抖程序，实用性强，易明白，测试成功啦！-VHDL program button debounce procedures, practical, easy to understand, the test is successful!
uart-vhdl
- 不错的uart总线程序，已经测试过，没有问题啊-Good uart bus program, has been tested, there is no problem ah
vhdl
- 用来输入输出插入删除的程序 已经过测试 可以放心使用-Insertion and deletion procedures used to input and output has been tested and is safe to use
Full-Adder
- 用VHDL实现的全加器，采用dataflow style编写，是学习VHDL入门级的好范例. 包括主程序和测试程序-Full adder by using VHDL, dataflow style writing. It is a good example of VHDL especially for the entry-level leaner（Testbench included）
setled
- fpga vhdl花样流水灯测试程序简单流水灯-Fpga VHDL pattern of flowing water light test procedure
Basys2UserTest
- 由digilent生产的basys2开发板用户测试程序VHDL版-Produced by the digilent basys2 development board user testing procedures VHDL version
ethenete
- 基于verilog的三速以太网源程序，文件中包含源程序和测试程序。-tri_model ethernet source code based on vhdl languange, include source code and testbench in the file.